**Assignment
No. 9 Register Transfers**

1. Show the diagram of
the hardware that implements the register transfer statement

2. The outputs of
registers R0, R1, R2, and R3 are connected through 4-to-1 multiplexers to the
inputs of a fifth register, R4. Each
register is 8 bits long. The required
transfers, as dictated by four control variables, are

The control variables are mutually exclusive (i.e., only one variable can be
equal to 1 at any time) while the other three are equal to 0. Also, no transfer into R4 is to occur for all
control variables equal to 0. Using
registers and a multiplexer, draw a logic diagram of the hardware that
implements a single bit of these register transfers.

3. Using two 4-bit
registers R1 and R2, and AND gates, OR gates, and inverters, draw one bit slice
of the logic diagram that implements all of the following statements:

Clear
R2 synchronously with the clock

Complement
R2

Transfer
R1 to R2

The control variables are mutually exclusive (i.e., only
one variable can be equal to 1 at any time) while the other two are equal to
0. Also, no transfer into R2 is to occur
for all control variables equal to 0.

4. The serial adder of
Figure 7-22 (4e) or Figure 6-24 (5e) uses two 4-bit registers. Register A holds the binary number 0111 and
register B holds 0101. The carry
flip-flop is initially reset to 0. List
the binary values in register A and the carry flip-flop after each of four
shifts.