Assignment No. 4 Combinational Logic Design


1.    Design an excess-3-to-BCD code converter that gives output code 0000 for all invalid input combinations.

2.    Design a circuit to implement the following pair of Boolean equations:

To simplify drawing the schematic, the circuit is to use a hierarchy based on the factoring shown in the equation. Three instances (copies) of a single hierarchical circuit component made up of two AND gates, and OR gate, and an inverter are to be used. Draw the logic diagram for the hierarchical component and for the overall circuit diagram using a symbol for the hierarchical component.

3.    By using the combinational circuit analysis technique learned in class, verify that the circuit shown in Figure 3-32 (4e) or Figure 3-55 (5e) generates the exclusive-NOR function.

4.    The NOR gates in Figure 6-26 (4e) or Figure 2-39 (5e) have propagation delay
tpd = 0.073 ns and the inverter has a propagation delay tpd = 0.048 ns. What is the propagation delay of the longest path through the circuit?